Signal Integrity Engineer Intern

<p> </p> <h1 class="wnfdnti _1ibi0s33y _1ibi0s34u" data-pm-slice="1 1 []">Signal Integrity Engineer Intern</h1> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea"><strong>Location:</strong> San Jose, California, United States</p> <h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">About the role</h2> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Astera Labs is seeking a Signal Integrity Engineer Intern to join the Signal and Power Integrity (SI/PI) team. In this role, you will gain hands-on experience analyzing high-speed interconnects and supporting PCB- and system-level designs through simulation, measurement, and cross-functional engineering collaboration.</p> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">You will work on a meaningful project with guidance from experienced engineers while building practical skills in signal-integrity analysis, lab validation, technical communication, and engineering judgment.</p> <h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">What you will do</h2> <ul class="wnfdntf"> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support pre-layout, layout, and post-layout signal-integrity analysis for high-speed PCB and system designs.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Build or update simulation models and analyze critical interconnect behavior, including impedance, insertion loss, return loss, reflections, and crosstalk.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Assist with S-parameter extraction, simulation, measurement, and interpretation for high-speed channels and differential signals.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support lab validation using equipment such as time-domain reflectometers, vector network analyzers, high-speed oscilloscopes, spectrum analyzers, and probing fixtures, with appropriate mentorship.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Help plan and execute PCB/PCBA validation activities, prioritize critical items, and document results.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Organize raw measurement data, screenshots, S-parameter files, and analysis results in project documentation.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Collaborate with electrical, layout, validation, NPI, and other engineering partners to investigate issues and communicate findings.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Contribute to technical reports, design reviews, and a final project presentation that explains the work, results, and impact.</p> </li> </ul> <h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">What you bring</h2> <ul class="wnfdntf"> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Enrollment in a bachelor’s, master’s, or Ph.D. program in electrical engineering, computer engineering, or a related field.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Academic, research, or project experience with one or more of the following: high-speed digital design, signal integrity, transmission lines, electromagnetics, PCB design, differential signaling, or S-parameters.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">A foundational understanding of frequency-domain or time-domain analysis and how interconnect design affects signal quality.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Ability to learn simulation and measurement workflows, work carefully with technical data, and communicate conclusions clearly.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Strong ownership, curiosity, practical judgment, and willingness to collaborate across functions.</p> </li> </ul> <h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Preferred qualifications</h2> <ul class="wnfdntf"> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Familiarity with PCB or system-level SI/PI simulation, channel analysis, or lab measurement.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Exposure to tools or workflows used for high-speed analysis, such as ADS, HFSS, CST, Keysight, Cadence, or equivalent platforms.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience with Python, MATLAB, or another scripting language for data processing and engineering analysis.</p> </li> <li class="wnfdnte _1ibi0s33w"> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Familiarity with calibration, de-embedding, Touchstone/S-parameter files, eye diagrams, or BER analysis.</p> </li> </ul> <h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Internship experience and compensation</h2> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">This is a paid, hourly U.S. internship. The applicable hourly rate is determined as part of the offer process and specified in the offer letter, depending on education level ranges from $35/hour to $55/hour. U.S. interns currently receive a $500-per-week housing/relocation stipend for the duration of the internship. Interns participate in Early Career programming, including technical and professional-development sessions, community events, and an end-of-program project presentation.</p> <p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea"></p> <h2>Equal opportunity</h2> <p>Astera Labs is an equal opportunity employer committed to fostering a diverse and inclusive workplace. We encourage anyone with relevant experience to apply.</p> <p> </p>